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NVIDIA H100 SXM
Methods ↗

4 entities and 3 documented connections shown.

Connections

4 entities · 3 claims
100%

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STARTING ENTITYDIRECT CONNECTIONSSECOND STEPUses memory technology · SUPPORTEDUses memory technologyUses memory technology · SUPPORTEDUses memory technologyUses memory technology · SUPPORTEDUses memory technologyAMD Instinct MI300X · productPRODUCTAMD Instinct MI300XHBM3 · memory technologyMEMORY TECHNOLOGYHBM3NVIDIA H100 SXM · productPRODUCTSTARTNVIDIA H100 SXMAMD Instinct MI300A · productPRODUCTAMD Instinct MI300A
CompanyChip / productTechnologyPlace / facility
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Relationships & evidence (3)
Every displayed connection is a scoped claim. Arrows follow subject to object.
SubjectRelationshipObjectStatusEvidence
NVIDIA H100 SXMHBM3SUPPORTEDSource-reported snapshot: 2022-03-22
Why are these connected?

Variant-specific: NVIDIA also describes PCIe H100 configurations with HBM2e.

NVIDIA Hopper Architecture In-Depth

NVIDIA Technical Blog · Tier A · Primary source · supports

NVIDIA specifies H100 SXM5 with 80 GB HBM3 across five HBM3 stacks.

Location: H100 SXM5 implementation

Published
2022-03-22
Retrieved
2026-09-08

Store factual paraphrase, metadata and link only. No source document redistribution or inferred license; no source bytes retained.

Full claim history →
AMD Instinct MI300XHBM3SUPPORTEDSource-reported snapshot: 2023-12-06
Why are these connected?

No memory-chip vendor is asserted.

Full claim history →
AMD Instinct MI300AHBM3SUPPORTEDSource-reported snapshot: 2023-12-06
Why are these connected?

No memory-chip vendor is asserted.

Full claim history →
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From NVIDIA H100 SXM · up to two relationship steps.

A path retains its original claims. Shared technology does not establish a supply contract.

4 nodes · 3 claims
Scope

Relationships may describe different dates. A path does not establish simultaneous activity. Bounded source-backed collection. Missing or filtered connections do not establish absence. Supported does not mean independently verified.