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Find public resources, specifications, standards metadata, calculators, and tapeout programs.

Public metadata and educational tools only. Example profiles and research previews without sources are excluded. Dates and source limitations stay attached to each result.

153 results to explore

  1. Standards metadata

    2.0 — Universal Chiplet Interconnect Express

    Universal Chiplet Interconnect Express의 공식 발행 metadata와 revision 상태를 추적합니다.

  2. Standards metadata

    2.1 — DisplayPort

    DisplayPort의 공식 발행 metadata와 revision 상태를 추적합니다.

  3. Standards metadata

    3.1 — Compute Express Link

    Compute Express Link의 공식 발행 metadata와 revision 상태를 추적합니다.

  4. Standards metadata

    6.0 — PCI Express

    PCI Express의 공식 발행 metadata와 revision 상태를 추적합니다.

  5. Standards metadata

    7.0 — PCI Express

    PCI Express의 공식 발행 metadata와 revision 상태를 추적합니다.

  6. Specifications

    AEC-Q100 Revision H

    Automotive integrated-circuit qualification document family indexed from the official AEC document register; issue date is not asserted.

    Source-linked · conditions applyCatalog date: 2026-08-29Source for AEC-Q100 Revision H (opens in a new tab)
  7. Tapeout & PDKs

    AIM Photonics MPW

    The published date covers listed passive, active, SiN and interposer runs; process-node detail is not inferred.

    Official schedule publishes platform-specific design due datesCatalog date: 2026-08-28Source for AIM Photonics MPW (opens in a new tab)
  8. Open silicon

    Amaranth HDL

    A Python HDL and toolchain connecting hardware description, simulation, and FPGA builds.

    External index · BSD-2-ClauseCatalog date: Reviewed 2026-08-18Source for Amaranth HDL (opens in a new tab)
  9. Tapeout & PDKs

    ams OSRAM Foundry MPW

    Process families are public; no slot or date is asserted without the live official calendar.

    Official calendar page; current dates require re-verificationCatalog date: 2026-08-28Source for ams OSRAM Foundry MPW (opens in a new tab)
  10. Standards metadata

    approved contribution metadata — OpenHBI

    OpenHBI의 공식 발행 metadata와 revision 상태를 추적합니다.

    Public metadata · exact release date unverifiedCatalog date: 2026-08-26Source for approved contribution metadata — OpenHBI (opens in a new tab)
  11. Open silicon

    BOOM

    An open out-of-order superscalar RISC-V core generator designed to compose with the Rocket Chip ecosystem.

    External index · Apache-2.0Catalog date: Reviewed 2026-08-22Source for BOOM (opens in a new tab)
  12. Tapeout & PDKs

    Caravel user project harness

    Efabless/Google reference harness for open-source SoC projects.

    active public repositoryCatalog date: 2026-08-26Source for Caravel user project harness (opens in a new tab)
  13. Tapeout & PDKs

    CEDEC / SilTerra MPW

    The route is eligibility-limited; open public access is not implied.

    Program-controlled academic accessCatalog date: 2026-08-28Source for CEDEC / SilTerra MPW (opens in a new tab)
  14. Tapeout & PDKs

    ChipIN / C2S MPW Services

    Eligibility and current calls must be verified on the government portal.

    Program-window controlled; confirm current callCatalog date: 2026-08-28Source for ChipIN / C2S MPW Services (opens in a new tab)
  15. Calculators

    Chiplet Composite Yield

    Independent-yield product for an illustrative multi-die assembly.

    Derived · educational calculationFormula and limitations on the tool page
  16. Calculators

    Clock Cycle Budget

    Allocate a period after uncertainty and named path terms.

    Derived · educational calculationCatalog date: 2026-08-26Source for Clock Cycle Budget (opens in a new tab)
  17. Tapeout & PDKs

    CMC Microsystems MPW 2026

    UPP and standard deadlines are distinct milestone classes. Process fit and eligibility are not inferred.

    Live official table publishes process-specific design deadlinesCatalog date: 2026-08-28Source for CMC Microsystems MPW 2026 (opens in a new tab)
  18. Open silicon

    cocotb

    A Python framework for writing coroutine-based testbenches for Verilog and VHDL designs.

    External index · BSD-3-ClauseCatalog date: Reviewed 2026-08-18Source for cocotb (opens in a new tab)
  19. Calculators

    Core Size

    Estimate core area from standard-cell area and target utilization.

    Derived · educational calculationFormula and limitations on the tool page
  20. Tapeout & PDKs

    CORNERSTONE Photonics MPW

    Sign-up and design-submission are separate milestones. Geographic and subsidy eligibility require direct verification.

    Official schedule publishes sign-up and design-submission milestonesCatalog date: 2026-08-28Source for CORNERSTONE Photonics MPW (opens in a new tab)