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NVIDIA H100 SXM

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urn:vlsi:entity:c985a0f3-d76c-481d-be94-8a5330c1b713

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SUPPORTED1 evidence record · Revision 1

NVIDIA H100 SXMUses memory technologyHBM3

Variant-specific: NVIDIA also describes PCIe H100 configurations with HBM2e.

Source-reported snapshot: 2022-03-22

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Evidence index 85/100 · A rule-based index, not the probability this claim is true. 1 independent source origin(s).

Dated source-reported snapshot. Publication date is not an inferred manufacturing start, contract start or legal-close date.

NVIDIA Hopper Architecture In-Depth ↗

NVIDIA Technical Blog · Tier A · Primary source · supports

Evidence summary: NVIDIA specifies H100 SXM5 with 80 GB HBM3 across five HBM3 stacks.

Location: H100 SXM5 implementation

Published: 2022-03-22 · Retrieved: 2026-09-08 · Extraction: manual-source-review

Store factual paraphrase, metadata and link only. No source document redistribution or inferred license; no source bytes retained.

First observed by VLSI: 2026-09-08T15:57:21.457Z. No independent human verification recorded.

Review: Evidence ingested by curated-primary-sources/1.0.0. Variant-specific: NVIDIA also describes PCIe H100 configurations with HBM2e.

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