Skip to main content
VLSI Korea

SEMICONDUCTOR PRINCIPLES

Packaging and systems

A die is a remarkable object. A package makes it a component that can connect to the rest of a machine.

Test before separating.

Electrical probing checks dies while they are still on the wafer. Dicing then separates them for assembly. A patterned wafer is not a guarantee that every die works.

A connection at every level.

This conventional flip-chip illustration has one die, small electrical bumps, a package substrate and board-side solder balls. Explore the separated view, then bring it together. It represents a packaging principle, not a named processor.

A component, ready for a system.

After assembly, electrical, thermal and functional checks qualify the component for use. Advanced multi-die packages are another option: chiplets, interposers or HBM can serve specific designs. They are not universal package ingredients.

The exploded scene is a generic single-die example. It deliberately does not combine branded bridge, stacking or interposer technologies into a fictional product.

Technical context

After wafer fabrication, each die can be electrically probed, separated, attached to a package and tested again as a usable component. A conventional package may carry one die. Advanced packaging can instead connect several dies, sometimes with an interposer and high-bandwidth memory, to make a system from multiple pieces of silicon.

  • Wafer sort electrically tests individual dies while they remain on the wafer; good dies can then be separated for later assembly.
  • Assembly mounts one or more dies on a package substrate, and electrical, thermal and functional testing follows before shipment.
  • Advanced packaging is optional rather than universal: for example, TSMC CoWoS can connect SoCs/chiplets and HBM through interposer-based integration.

Sources

Advanced Packaging Innovations · Intel

How Silicon Die Become Chip Packages · Intel