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Auditable claim record

RISCV Processor Design · listed in shuttle

Tiny Tapeout 9 · SUPPORTED

urn:vlsi:claim:e880e67978b947107df2d90088f7add056ade5b3ab5f99b243dd638a86a094db

Official registry lists this repository, submitted revision and module. The listing does not establish fabrication, manufacture, validation or measured results.

Back to RISCV Processor Design → · Complete history as JSON · JSON-LD

Evidence

Tiny Tapeout 9 official shuttle registry ↗

The Tiny Tapeout 9 registry lists this repository at submitted revision e6f22d55c76221ab622e3c6deef5420376e3d2c0, under module tt_um_Nishanth_RISCV.

Tiny Tapeout official registry · projects[356]: repository, commit and macro · supports

Published date unknown · Retrieved 2026-10-13T23:58:53.989Z

urn:vlsi:evidence:31c62aa6a1cdae9a3dc33b9aea64296181d3b71f9485964bffc05e8cd4fcfc37

Assessment history

New assessments preserve earlier records. A correction changes the current interpretation without rewriting what VLSI knew before it.

Recorded assessments, oldest first
RevisionRecorded at (UTC)StatusValidityReviewer & reason
12026-10-14T00:04:16.900ZSUPPORTEDunknown
unknown
checked-catalog-source-adapter (adapter)

Evidence ingested by official-registry-and-pinned-documents/1.0.0. Explicit upstream evidence only. No fabrication, validation, successful tapeout, measured performance, arbitrary-version interoperability or production qualification is inferred.