Auditable claim record

8-bit educational SAP-style CPU · listed in shuttle

Tiny Tapeout IHP 26b · SUPPORTED

urn:vlsi:claim:7fdebc6980ba4a56f2dbe2ff7075316fc3c7047b6d33af58f9f4a5153f397edb

Official registry lists this repository, submitted revision and module. The listing does not establish fabrication, manufacture, validation or measured results.

Back to 8-bit educational SAP-style CPU → · Complete history as JSON · JSON-LD

Evidence

Tiny Tapeout IHP 26b official shuttle registry ↗

The Tiny Tapeout IHP 26b registry lists this repository at submitted revision 265f92a2bb08b8d1cd7dbabe559d16a2a4229acc, under module tt_um_tiarinix_ttihp_verilog_template.

Tiny Tapeout official registry · projects[82]: repository, commit and macro · supports

Published date unknown · Retrieved 2026-10-13T23:58:54.892Z

urn:vlsi:evidence:187636a294f16dd7b4830061ef01c775eb1fd8c5ad19d321c42134e57724c147

Assessment history

New assessments preserve earlier records. A correction changes the current interpretation without rewriting what VLSI knew before it.

Recorded assessments, oldest first
Revision	Recorded at (UTC)	Status	Validity	Reviewer & reason
1	2026-10-14T00:04:17.212Z	SUPPORTED	unknown unknown	checked-catalog-source-adapter (adapter) Evidence ingested by official-registry-and-pinned-documents/1.0.0. Explicit upstream evidence only. No fabrication, validation, successful tapeout, measured performance, arbitrary-version interoperability or production qualification is inferred.