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Auditable claim record

OSS CAD Suite · includes

rIC3 · SUPPORTED

urn:vlsi:claim:cfe11fe88df0999b1a7be830b9bb46a91a64f922301aaa38d283b635d030db81

The official OSS CAD Suite manifest lists this component. Platform availability, target versions and individual component licenses remain separate; inclusion is not universal interoperability.

Back to OSS CAD Suite → · Complete history as JSON · JSON-LD

Evidence

OSS CAD Suite pinned component manifest ↗

The pinned OSS CAD Suite component list includes rIC3.

YosysHQ official repository · Pinned README.md line 60 · supports

Published date unknown · Retrieved 2026-10-13T23:58:55.205Z

urn:vlsi:evidence:645811c438f5dfef2ead8a1c595f168e36576c62ae5285f812372b2b21fbc941

Assessment history

New assessments preserve earlier records. A correction changes the current interpretation without rewriting what VLSI knew before it.

Recorded assessments, oldest first
RevisionRecorded at (UTC)StatusValidityReviewer & reason
12026-10-14T00:04:17.563ZSUPPORTEDunknown
unknown
checked-catalog-source-adapter (adapter)

Evidence ingested by official-registry-and-pinned-documents/1.0.0. Explicit upstream evidence only. No fabrication, validation, successful tapeout, measured performance, arbitrary-version interoperability or production qualification is inferred.