Knowledge / interface
NVIDIA third-generation NVLink Canonical entity with source-backed relationships and retained history.
urn:vlsi:entity:820ce0e8-5b7e-4e5b-a798-ee50e3258f3d
A source-reported date is a historical snapshot. Unknown validity is excluded when a date is selected. “Known to VLSI” uses the end of that UTC day. This entity’s heading uses its current label.
Recorded relationships SUPPORTED 1 evidence record · Revision 1
Interconnect availability and topology can vary by A100 form factor/system.
Source-reported snapshot: 2020-05-14
Inspect evidence, confidence and history Evidence index 85/100 · A rule-based index, not the probability this claim is true. 1 independent source origin(s).
Dated source-reported snapshot. Publication date is not an inferred manufacturing start, contract start or legal-close date.
NVIDIA Technical Blog · Tier A · Primary source · supports
Evidence summary: NVIDIA says third-generation NVLink is implemented in A100 GPUs.
Location: lines 91-94 / Third-generation NVIDIA NVLink
Published: 2020-05-14 · Retrieved: 2026-09-08 · Extraction: manual-source-review
Store factual paraphrase, metadata and link only. No source document redistribution or inferred license; no source bytes retained.
First observed by VLSI: 2026-09-08T15:57:21.457Z. No independent human verification recorded.
Review: Evidence ingested by curated-primary-sources/1.0.0. Interconnect availability and topology can vary by A100 form factor/system.
Full claim history → Connections through a shared technology show an ecosystem association. They do not establish a supply contract, exclusive dependency or supplier share. Inspect coverage gaps →