Knowledge / memory technology
HBM2 Canonical entity with source-backed relationships and retained history.
urn:vlsi:entity:28f91da6-231c-46ef-8fbd-4d1cb14cac4b
A source-reported date is a historical snapshot. Unknown validity is excluded when a date is selected. “Known to VLSI” uses the end of that UTC day. This entity’s heading uses its current label.
Recorded relationships SUPPORTED 1 evidence record · Revision 1
This is the cited 40 GB configuration; later A100 variants use HBM2e.
Source-reported snapshot: 2020-05-14
Inspect evidence, confidence and history Evidence index 85/100 · A rule-based index, not the probability this claim is true. 1 independent source origin(s).
Dated source-reported snapshot. Publication date is not an inferred manufacturing start, contract start or legal-close date.
NVIDIA Technical Blog · Tier A · Primary source · supports
Evidence summary: NVIDIA specifies 40 GB of HBM2 for the A100 discussed in the architecture article.
Location: lines 82-84 / 40 GB HBM2 and 40 MB L2 cache
Published: 2020-05-14 · Retrieved: 2026-09-08 · Extraction: manual-source-review
Store factual paraphrase, metadata and link only. No source document redistribution or inferred license; no source bytes retained.
First observed by VLSI: 2026-09-08T15:57:21.457Z. No independent human verification recorded.
Review: Evidence ingested by curated-primary-sources/1.0.0. This is the cited 40 GB configuration; later A100 variants use HBM2e.
Full claim history → Connections through a shared technology show an ecosystem association. They do not establish a supply contract, exclusive dependency or supplier share. Inspect coverage gaps → 
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