Auditable claim record

Basic model for Systollic array implementation of LIF · listed in shuttle

Tiny Tapeout 9 · SUPPORTED

urn:vlsi:claim:794adec715e09d214a0bc98ee08d119906c9d7af5d3f87a0de3fc9439381b6d1

Official registry lists this repository, submitted revision and module. The listing does not establish fabrication, manufacture, validation or measured results.

Back to Basic model for Systollic array implementation of LIF → · Complete history as JSON · JSON-LD

Evidence

Tiny Tapeout 9 official shuttle registry ↗

The Tiny Tapeout 9 registry lists this repository at submitted revision 7e547ff10e48bf6a40a930ba6849d818651e631d, under module tt_um_systolicLif.

Tiny Tapeout official registry · projects[297]: repository, commit and macro · supports

Published date unknown · Retrieved 2026-10-13T23:58:53.989Z

urn:vlsi:evidence:d6f2446c16ee725759d8850ebf0899de9e66ddf4f1f1ab55d4e26cd1ee0f1a15

Assessment history

New assessments preserve earlier records. A correction changes the current interpretation without rewriting what VLSI knew before it.

Recorded assessments, oldest first
Revision	Recorded at (UTC)	Status	Validity	Reviewer & reason
1	2026-10-14T00:04:16.888Z	SUPPORTED	unknown unknown	checked-catalog-source-adapter (adapter) Evidence ingested by official-registry-and-pinned-documents/1.0.0. Explicit upstream evidence only. No fabrication, validation, successful tapeout, measured performance, arbitrary-version interoperability or production qualification is inferred.