Auditable claim record

Clock Domain Crossing FIFO · listed in shuttle

Tiny Tapeout 7 · SUPPORTED

urn:vlsi:claim:2d2594cfa342a2e083ef230e155b42275798bb54db3675ae473236579e6aa602

Official registry lists this repository, submitted revision and module. The listing does not establish fabrication, manufacture, validation or measured results.

Back to Clock Domain Crossing FIFO → · Complete history as JSON · JSON-LD

Evidence

Tiny Tapeout 7 official shuttle registry ↗

The Tiny Tapeout 7 registry lists this repository at submitted revision ff14afce16efaed6cf4bd2bd030ef32e10039362, under module tt_um_pa1mantri_cdc_fifo.

Tiny Tapeout official registry · projects[119]: repository, commit and macro · supports

Published date unknown · Retrieved 2026-10-13T23:58:53.982Z

urn:vlsi:evidence:a968bd07225f4e03d323c19aedd7b0f373a67e203c0df43a51da7a2f0d69013d

Assessment history

New assessments preserve earlier records. A correction changes the current interpretation without rewriting what VLSI knew before it.

Recorded assessments, oldest first
Revision	Recorded at (UTC)	Status	Validity	Reviewer & reason
1	2026-10-14T00:04:16.789Z	SUPPORTED	unknown unknown	checked-catalog-source-adapter (adapter) Evidence ingested by official-registry-and-pinned-documents/1.0.0. Explicit upstream evidence only. No fabrication, validation, successful tapeout, measured performance, arbitrary-version interoperability or production qualification is inferred.