{"apiVersion":"1.0","data":{"id":"tt-33028fc7ca18","name":"Dgrid_FPU","owner":"fabricchip","source":"https://github.com/fabricchip/tt06_um_fpu","licenseSource":"https://github.com/fabricchip/tt06_um_fpu/blob/a0db1e19141ae2860879177c93617f09242a575a/LICENSE","license":"Apache-2.0","description":"Tiny Tapeout 6 design submission. Project metadata identifies its implementation as Verilog; source and license are linked at the submitted revision.","domains":["Digital"],"kind":"IP/Design","tasks":["Architecture"],"language":"Verilog","target":"Tiny Tapeout submitted design","toolchain":"See the pinned project documentation","tags":["Tiny Tapeout","Submitted design","Tiny Tapeout 6","Digital interface"],"discoverySources":["https://tinytapeout.github.io/tinytapeout-06/shuttle_index.json"],"evidence":{"readmeUrl":"https://github.com/fabricchip/tt06_um_fpu/blob/a0db1e19141ae2860879177c93617f09242a575a/info.yaml","licenseUrl":"https://raw.githubusercontent.com/fabricchip/tt06_um_fpu/a0db1e19141ae2860879177c93617f09242a575a/LICENSE","licenseSha256":"c71d239df91726fc519c6eb72d318ec65820627232b2f796219e87dcf35d0ab4","checkedAt":"2026-09-26T19:36:05.442287+00:00","notes":"Registry metadata import. License text matched a recognized root grant at the submitted revision; third-party files may have separate terms. Source metadata is author supplied. No build, fabrication, or measurement claim is made by Hub."},"sourceRevision":"a0db1e19141ae2860879177c93617f09242a575a","registry":"Tiny Tapeout","reviewMethod":"registry_metadata","metadataSha256":"cccee459ed3c75e18a3b455b5724902ac9b7cd57b0e1ab8bae617ebe031585cb","aliases":["tt_um_fpu","tt06_um_fpu"],"type":"Submitted Design","stage":"RTL","sourceLabel":"github.com/fabricchip/tt06_um_fpu","status":"External index","activitySource":"https://github.com/fabricchip/tt06_um_fpu/blob/a0db1e19141ae2860879177c93617f09242a575a/info.yaml","activity":"See upstream documentation for releases and maintenance status.","cataloged":"Registry indexed 2026-09-26","licenseScope":"Registry metadata import. License text matched a recognized root grant at the submitted revision; third-party files may have separate terms. Source metadata is author supplied. No build, fabrication, or measurement claim is made by Hub.","accent":"blue","glyph":"DG","passport":null,"links":{"self":"/api/v1/resources/tt-33028fc7ca18","html":"/repo/tt-33028fc7ca18","evidence":"/api/v1/resources/tt-33028fc7ca18/evidence","runs":"/api/v1/resources/tt-33028fc7ca18/runs"}},"attribution":{"catalog":"https://hub.vlsi.kr","methodology":"https://hub.vlsi.kr/methodology","note":"Source documentation, license evidence, Hub reproduction and silicon reports are separate claims."}}