{"claim":{"id":"urn:vlsi:claim:329833dd179b431ede6bcb6dfebcfeae0c528e34b4af3baf80ac1cf6c4de4bdd","ontologyVersion":"semiconductor/1.0.0","subjectId":"urn:vlsi:entity:52e03394-1894-4f4a-9bb5-586239e20ae8","predicate":"USES_PROCESS","objectId":"urn:vlsi:entity:fe341813-d4d9-41cb-91eb-7820d1e30b56","value":null,"qualifiers":{"scope":"Evidence names the process and TSMC; it does not identify a fab location."},"status":"SUPPORTED","reviewedStatus":"SUPPORTED","confidence":{"version":"evidence-index/1.0.0","score":85,"eligible":true,"factors":{"authority":45,"direct":15,"independence":0,"extraction":10,"resolution":15,"supportingEvidence":1,"independentOrigins":1,"refuted":false},"interpretation":"Rule-based evidence index, not a calibrated probability; verification is a separate reviewed status."},"temporal":{"kind":"point","from":"2020-05-14","to":null,"basis":"Dated source-reported snapshot. Publication date is not an inferred manufacturing start, contract start or legal-close date."},"firstObservedAt":"2026-09-08T15:57:21.457Z","recordedAt":"2026-09-08T15:57:21.457Z","lastEvidenceCheckedAt":"2026-09-08T15:57:21.457Z","lastVerifiedAt":null,"revision":1,"assessmentId":"urn:vlsi:assessment:a78a0160-08da-4160-9f8f-52550beb4568","review":{"actorId":"curated-source-agent","actorKind":"agent","reason":"Evidence ingested by curated-primary-sources/1.0.0. Evidence names the process and TSMC; it does not identify a fab location."},"conflicts":[],"evidence":[{"id":"urn:vlsi:evidence:f980b87623cd43a402425bade9fd1346762108a8a504f95c7cf448ff1cc145c9","claim_id":"urn:vlsi:claim:329833dd179b431ede6bcb6dfebcfeae0c528e34b4af3baf80ac1cf6c4de4bdd","source_id":"urn:vlsi:source:e34cdd121e2068697a3d287495012e7e9e71092f9478d24b42f53d454a7c6a88","stance":"supports","locator":"lines 52-54 / Key features","paraphrase":"NVIDIA identifies the GA100 GPU that powers A100 as fabricated on TSMC's 7nm N7 process.","method":"manual-source-review","extraction_certainty":1,"resolution_certainty":1,"observed_at":"2026-09-08T15:57:21.457Z","ingestion_key":"primary-source-seed/2026-09-09/v1","url":"https://developer.nvidia.com/blog/?p=17431","title":"NVIDIA Ampere Architecture In-Depth","publisher":"NVIDIA Technical Blog","tier":"A","is_primary":1,"independence_group":"nvidia","published_at":"2020-05-14","retrieved_at":"2026-09-08T15:56:30.763Z","rights":"reference-only","rights_note":"Store factual paraphrase, metadata and link only. No source document redistribution or inferred license; no source bytes retained.","content_hash":null}]},"assessments":[{"id":"urn:vlsi:assessment:a78a0160-08da-4160-9f8f-52550beb4568","claim_id":"urn:vlsi:claim:329833dd179b431ede6bcb6dfebcfeae0c528e34b4af3baf80ac1cf6c4de4bdd","revision":1,"previous_id":null,"status":"SUPPORTED","valid_kind":"point","valid_from":"2020-05-14","valid_to":null,"temporal_basis":"Dated source-reported snapshot. Publication date is not an inferred manufacturing start, contract start or legal-close date.","checked_at":"2026-09-08T15:57:21.457Z","confidence":85,"confidence_version":"evidence-index/1.0.0","factors_json":"{\"authority\":45,\"direct\":15,\"extraction\":10,\"independence\":0,\"independentOrigins\":1,\"refuted\":false,\"resolution\":15,\"supportingEvidence\":1}","reason":"Evidence ingested by curated-primary-sources/1.0.0. Evidence names the process and TSMC; it does not identify a fab location.","actor_id":"curated-source-agent","actor_kind":"agent","recorded_at":"2026-09-08T15:57:21.457Z"}]}